Analog Circuit Design: RF Circuits: Wide band, Front-Ends, by Michiel Steyaert, Arthur H.M. van Roermund, Johan Huijsing

By Michiel Steyaert, Arthur H.M. van Roermund, Johan Huijsing

Analog Circuit layout is a vital reference resource for analog circuit designers and researchers wishing to maintain abreast with the most recent improvement within the box. the academic insurance additionally makes it appropriate to be used in a sophisticated layout path.

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The next sections go into details on some aspects of the design optimisation of the circuits. 6. Linearity The current generated by the DAC is highly linear, with a 3rd harmonic suppression over 60dBc. The LPF causes some linearity degradation due to the time variant operating point of the cascode transistor. Extra current sources were introduced to minimize this effect and to obtain a linearity around 50dBc. 2 in the cascode. In the consumption table this 320PA surplus current is noted as the LPF current.

Also the isolation structure between the digital and analog part is clearly visible. : Plot of the presented STLC2500 BT single chip 6. Measurements Results The presented chip has been extensively characterized over process corners and temperature on bench set-ups and by test equipment in the production line. The STLC 2500 has been fully Bluetooth qualified over the –40 to +85 degC temperature range. 5 mode are shown. 5 mode. +7dBm output power is reached at room temperature. The variation over the extended temperature range –40 to +100 degC is less than +/-1dB.

Compared to figure 8 the IF mixing stage, the first band-pass filter and the amplifier are removed out of the block diagram of figure 9. This can be done if the DAC generates a high frequency signal. The signal must be modulated in the digital domain. It must be centered around the IF frequency that was used in the super-heterodyne transmitter. The single-hop transmitter thus requires a high-speed DAC. If we would only remove the first mixing stage and the first band-pass filter in figure 8 then we could allow the DAC to have a smaller output amplitude.

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